Jose-Maria Arnau

Jose-Maria Arnau
Contact
Information
Department of Computer Architecture
Polytechnic University of Catalonia
Jordi Girona 1-3, C6-221
Campus Nord UPC
08034 Barcelona, Spain
Phone: +34 622 427389
E-mail: [email protected]
www: http://jarnau.site.ac.upc.edu/
Research
Interests
Low-Power Mobile GPUs, GPU Drivers, GPU Programming, Computer Graphics,
Heterogeneous Architectures
Education
• Polytechnic University of Catalonia, 2011 - present
Ph.D. in Computer Architecture
Thesis: “Energy-Efficient Mobile GPU Systems”
Advisers: Assistant Prof. Joan-Manuel Parcerisa, Dr. Polychronis Xekalakis
• Polytechnic University of Catalonia, Oct 2010 - Sep 2011
MSc. Degree on Computer Architecture, Networks and Systems
Grade: 9.75/10 (Award for achieving the highest overall mark)
Master’s Thesis: “High Performance, Ultra-Low Power Streaming Systems”
Adviser: Assistant Prof. Joan-Manuel Parcerisa
Co-Advisers: Dr. Polychronis Xekalakis, Prof. Antonio Gonzalez
• University Jaume I of Castellon, 2003 - 2008
BSc. Degree on Computer Engineering
Grade: 9.64/10 (Award for achieving the highest overall mark)
Final Year Project: “Development of a Game Engine”
Adviser: Prof. Miguel Chover Selles
Professional
Experience
• Research Assistant, Polytechnic University of Catalonia, 2011 - Present
I currently hold a research scientist position in the ARCO (Architectures and Compilers) research group, supported by a FI-Research grant from the Catalan Government. I am researching technologies and techniques that improve the energyefficiency of mobile GPUs, by modifying the driver and the microarchitecture. My
research analyzes the suitability of decoupled access/execute architectures for mobile graphics hardware to tolerate memory latency in an energy efficient manner.
My research also proposes memory bandwidth saving techniques that avoid redundant texture fetches and GPU memoization techniques that remove redundant
computations.
• Visiting Researcher, University of Edinburgh, July 2013 - Sep 2013
I performed a co-design space exploration of compiler optimizations and hardware
parameters in GPGPU environments. I used a LLVM-based OpenCL compiler to
evaluate the power-performance trade-offs of multiple compiler optimizations, and
I explored the hardware design space by using GPGPUSim and GPUWattch.
• Software developer, Institute of Ceramic Technology, Sep 2008 - July
2010
I developed several applications for scientific data visualization, using OpenMP for
processing massive amounts of data provided by a 3D scanner and OpenGL for rendering 3D tomographies. I also implemented multiple image processing algorithms
to automatically detect imperfections in the objects analyzed with the scanner.
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• Research Assistant, University Jaume I of Castellon, Jan 2008 - June
2008
I developed a game engine for teaching undergraduates with the aim of facilitating
the learning of computer graphics. I designed the engine to be simple and clear,
but also powerful enough to support visually compelling 3D scenes. I implemented
multiple 3D effects, such as per-pixel lighting, dynamic shadows or particle systems,
by exploiting modern GPU programmability. I placed special emphasis on terrain
rendering techniques and automatic generation of outdoor 3D environments.
Awards-Honors
• Intel Doctoral Student Honor Programme, awarded by Intel Corporation to
outstanding PhD students in the area of Computer Architecture
• FI Research Grant, funding from the Catalan Government for a three year PhD
• Best Student Graduating in MSc Computer Architecture, Networks and
Systems, from the Barcelona School of Informatics at the Polytechnic University
of Catalonia
• Second Best Student Graduating in Computer Engineering in Spain,
from the Spanish Government
• Best Student Graduating in Computer Engineering in the Valencian
Community, from the Valencian Government
• Best Student Graduating in Computer Engineering, from the University
Jaume I of Castellon
• Best Student Graduating in Computer Engineering, from the School of
Technology and Experimental Sciences of Castellon
• Research Collaboration Grant from the Spanish Ministry of Education,
funding for six month research collaboration in the Computer Graphics Group at
the University Jaume I of Castellon
Publications
• “Eliminating Redundant Fragment Shader Executions on a Mobile GPU via Hardware Memoization”
Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis
International Symposium on Computer Architecture (ISCA), June 2014
• “Parallel Frame Rendering: Trading Responsiveness for Energy on a Mobile GPU”
Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis
International Conference on Parallel Architectures and Compilation Techniques
(PACT), September 2013
• “TEAPOT: A Toolset for Evaluating Performance, Power and Image Quality on
Mobile Graphics Systems”
Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis
International Conference on Supercomputing (ICS), June 2013
• “Boosting Mobile GPU Performance with a Decoupled Access/Execute Fragment
Processor”
Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis
International Symposium on Computer Architecture (ISCA), June 2012
• “A Decoupled Access/Execute Architecture for Mobile GPUs”
Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis
In Proceedings of ACACES, July 2012
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• “Study of the pressing operation of large-sized tiles using X-ray absorption”
J.L. Amoros, G. Mallol, D. Llorens, J. Boix, J.M. Arnau, C.Feliu, J.A. Cerisuelo
and J.J. Gargallo
In Proceedings of Qualicer, February 2010
• “Rapid, harmless, and non-destructive measurement of ceramic tile bulk density”
G. Mallol, M. Llorens, J. Boix, J.M. Arnau and L. Foucard
In Proceedings of Qualicer, February 2010
Talks
• “Eliminating Redundant Fragment Shader Executions on a Mobile GPU via Hardware Memoization”, International Symposium on Computer Architecture (2014)
• “Parallel Frame Rendering: Trading Responsiveness for Energy on a Mobile GPU”,
International Conference on Parallel Architectures and Compilation Techniques
(2013)
• “TEAPOT: A Toolset for Evaluating Performance, Power and Image Quality on
Mobile Graphics Systems”, International Conference on Supercomputing (2013)
• “Optimizing Mobile GPU Memory Bandwidth via Parallel Frame Execution”, CArD
talk, University of Edinburgh (2013)
• “Dealing with Full HD Graphics in Smartphones and Tablets”, ARCO Internal
Seminar, Polytechnic University of Catalonia, (2013)
• “Boosting Mobile GPU Performance with a Decoupled Access/Execute Fragment
Processor”, International Symposium on Computer Architecture (2012)
• “Ultra Low-Power Rasterization Architectures”, ARCO Internal Seminar, Polytechnic University of Catalonia (2011)
Citizenship
Spanish
Languages
• Spanish: Native Speaker
• Catalan: Native Speaker
• English: Fluent
References
• Dr. Polychronis Xekalakis
Intel Labs, Intel Corporation
PhD Supervisor
[email protected]
+1 408 219 0218
3600 Juliette Ln, SC12
Santa Clara, CA, 95054
• Assistant Prof. Joan-Manuel Parcerisa
Polytechnic University of Catalonia
PhD Supervisor
[email protected]
+34 93 4011653
Jordi Girona 1-3, C6-116
Campus Nord UPC
08034 Barcelona, Spain
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